/* USER CODE BEGIN Header */
/**
  ******************************************************************************
  * @file    stm32f1xx_it.c
  * @brief   Interrupt Service Routines.
  ******************************************************************************
  * @attention
  *
  * <h2><center>&copy; Copyright (c) 2020 STMicroelectronics.
  * All rights reserved.</center></h2>
  *
  * This software component is licensed by ST under Ultimate Liberty license
  * SLA0044, the "License"; You may not use this file except in compliance with
  * the License. You may obtain a copy of the License at:
  *                             www.st.com/SLA0044
  *
  ******************************************************************************
  */
/* USER CODE END Header */

/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f1xx_it.h"
#include "FreeRTOS.h"
#include "task.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */

#include "queue.h"
/* USER CODE END Includes */

/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */

/* USER CODE END TD */

/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
 
/* USER CODE END PD */

/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
uint8_t ac_rx_buff[25];
uint8_t ac_rx_cont;
uint8_t ac_rx_status =0;
uint8_t adc_cont=0;
uint8_t uv_flag = 0;
extern uint8_t init_status;
extern xQueueHandle xQueueRx_pc_uart1;
extern xQueueHandle xQueueRx_bms_uart2;
extern xQueueHandle xQueueRx_ac_uart3;
extern uint32_t temp_v;
extern uint32_t temp_i;
extern uint32_t temp_ii;
extern uint32_t temp_v2;
extern uint8_t pow_on;
uint16_t v_temp[100];
uint16_t i_temp[100];
uint16_t v_temp1[100];
uint16_t i_temp1[100];

uint16_t max_v1;
uint16_t max_v2;
uint16_t max_i1;
uint16_t max_i2;
uint16_t min_v1;
uint16_t min_v2;
uint16_t min_i1;
uint16_t min_i2;

uint8_t aaa;

extern uint16_t aADCxConvertedData[7];
extern float dc_v[6];
extern float dc_i[6];

extern float v_k[6] ;
extern float i_k[6];
extern float i_k_a[6];


extern uint8_t rx_usart1_cnt;
extern uint8_t ModebusTxBuff[200];
extern uint8_t ModebusRxBuff[128];

extern uint8_t rx_usart3_cnt;
extern uint8_t ModebusTxBuff_M[128];
extern uint8_t ModebusRxBuff_M[128];
/* USER CODE END PM */

/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */

/* USER CODE END PV */

/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */

/* USER CODE END PFP */

/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */

/* USER CODE END 0 */

/* External variables --------------------------------------------------------*/

/* USER CODE BEGIN EV */

/* USER CODE END EV */

/******************************************************************************/
/*           Cortex-M3 Processor Interruption and Exception Handlers          */
/******************************************************************************/
/**
  * @brief This function handles Non maskable interrupt.
  */
void NMI_Handler(void)
{
  /* USER CODE BEGIN NonMaskableInt_IRQn 0 */

  /* USER CODE END NonMaskableInt_IRQn 0 */
  /* USER CODE BEGIN NonMaskableInt_IRQn 1 */

  /* USER CODE END NonMaskableInt_IRQn 1 */
}

/**
  * @brief This function handles Hard fault interrupt.
  */
void HardFault_Handler(void)
{
  /* USER CODE BEGIN HardFault_IRQn 0 */

  /* USER CODE END HardFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_HardFault_IRQn 0 */
    /* USER CODE END W1_HardFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Memory management fault.
  */
void MemManage_Handler(void)
{
  /* USER CODE BEGIN MemoryManagement_IRQn 0 */

  /* USER CODE END MemoryManagement_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
    /* USER CODE END W1_MemoryManagement_IRQn 0 */
  }
}

/**
  * @brief This function handles Prefetch fault, memory access fault.
  */
void BusFault_Handler(void)
{
  /* USER CODE BEGIN BusFault_IRQn 0 */

  /* USER CODE END BusFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_BusFault_IRQn 0 */
    /* USER CODE END W1_BusFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Undefined instruction or illegal state.
  */
void UsageFault_Handler(void)
{
  /* USER CODE BEGIN UsageFault_IRQn 0 */

  /* USER CODE END UsageFault_IRQn 0 */
  while (1)
  {
    /* USER CODE BEGIN W1_UsageFault_IRQn 0 */
    /* USER CODE END W1_UsageFault_IRQn 0 */
  }
}

/**
  * @brief This function handles Debug monitor.
  */
void DebugMon_Handler(void)
{
  /* USER CODE BEGIN DebugMonitor_IRQn 0 */

  /* USER CODE END DebugMonitor_IRQn 0 */
  /* USER CODE BEGIN DebugMonitor_IRQn 1 */

  /* USER CODE END DebugMonitor_IRQn 1 */
}

/**
  * @brief This function handles System tick timer.
  */
void SysTick_Handler(void)
{
  /* USER CODE BEGIN SysTick_IRQn 0 */

  /* USER CODE END SysTick_IRQn 0 */
  HAL_IncTick();
#if (INCLUDE_xTaskGetSchedulerState == 1 )
  if (xTaskGetSchedulerState() != taskSCHEDULER_NOT_STARTED)
  {
#endif /* INCLUDE_xTaskGetSchedulerState */
  xPortSysTickHandler();
#if (INCLUDE_xTaskGetSchedulerState == 1 )
  }
#endif /* INCLUDE_xTaskGetSchedulerState */
  /* USER CODE BEGIN SysTick_IRQn 1 */

  /* USER CODE END SysTick_IRQn 1 */
}

/******************************************************************************/
/* STM32F1xx Peripheral Interrupt Handlers                                    */
/* Add here the Interrupt Handlers for the used peripherals.                  */
/* For the available peripheral interrupt handler names,                      */
/* please refer to the startup file (startup_stm32f1xx.s).                    */
/******************************************************************************/

/**
  * @brief This function handles EXTI line1 interrupt.
  */
void EXTI1_IRQHandler(void)
{
  /* USER CODE BEGIN EXTI1_IRQn 0 */

  /* USER CODE END EXTI1_IRQn 0 */
  if (LL_EXTI_IsActiveFlag_0_31(LL_EXTI_LINE_1) != RESET)
  {    
    /* USER CODE BEGIN LL_EXTI_LINE_1 */
LL_GPIO_SetOutputPin(GPIOB,DC_LOCK_Pin);
LL_GPIO_SetOutputPin(GPIOB,BAT_LOCK_Pin);
LL_GPIO_ResetOutputPin(GPIOA,DC_GJ_Pin);	
LL_GPIO_SetOutputPin(GPIOA,BAT_LOCK_Pin);
LL_GPIO_SetOutputPin(GPIOA,DC_WORK_LED_Pin);
pow_on = 0;
uv_flag = 1;	
LL_EXTI_ClearFlag_0_31(LL_EXTI_LINE_1);		
    /* USER CODE END LL_EXTI_LINE_1 */
  }
  /* USER CODE BEGIN EXTI1_IRQn 1 */

  /* USER CODE END EXTI1_IRQn 1 */
}

/**
  * @brief This function handles DMA1 channel1 global interrupt.
  */
void DMA1_Channel1_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel1_IRQn 0 */
		if(LL_DMA_IsActiveFlag_TC1(DMA1) != RESET)
	{
		LL_DMA_ClearFlag_TC1(DMA1);
		v_temp[adc_cont] = aADCxConvertedData[0];	
		i_temp[adc_cont] = aADCxConvertedData[2];	
		v_temp1[adc_cont] = aADCxConvertedData[1];	
		//i_temp1[adc_cont] = aADCxConvertedData[1];	
		adc_cont ++;
    // temp_v += aADCxConvertedData[2];	
    // temp_i +=  aADCxConvertedData[3];
	 //temp_v2 += aADCxConvertedData[4];

   if (adc_cont == 100){
		 max_v1 = v_temp[0];
		 min_v1 = v_temp[0];
		 max_i1 = i_temp[0];
		 min_i1 = i_temp[0];
		 max_v2 = v_temp1[0];
		 min_v2 = v_temp1[0];
		 max_i2 = i_temp1[0];
		 min_i2 = i_temp1[0];
		 for(aaa=1;aaa<100;aaa++){ 
     if(max_v1 < v_temp[aaa]){
        max_v1 = v_temp[aaa];
		 }
		 if(max_v2 < v_temp1[aaa]){
        max_v2 = v_temp1[aaa];
		 }
        if(min_v2 > v_temp1[aaa]){
        min_v1 = v_temp[aaa];
				}
				if(min_v2 > v_temp1[aaa]){
        min_v1 = v_temp[aaa];
				}
			if(max_i1 < i_temp[aaa]){
        max_i1 = i_temp[aaa];
		 }
//			if(max_i2 < i_temp1[aaa]){
//        max_i2 = i_temp1[aaa];
//		 }
        if(min_i1 > i_temp[aaa]){
        min_i1 = i_temp[aaa];
				}	
//				if(min_i2 > i_temp1[aaa]){
//        min_i2 = i_temp1[aaa];
//				}	
     }
		 for(aaa=0;aaa<100;aaa++){
			 temp_v +=(uint32_t) v_temp[aaa];
			 temp_i +=(uint32_t) i_temp[aaa];
			 temp_v2 +=(uint32_t) v_temp1[aaa];
			// temp_ii +=(uint32_t) i_temp1[aaa];
		 }
		 temp_v = (temp_v-max_v1-min_v1)/98;
		 temp_i = (temp_i-max_i1-min_i1)/98;
		 temp_v2 = (temp_v2-max_v1-min_v1)/98;
		// temp_ii = (temp_i-max_i1-min_i1)/98;
	  // temp_v =temp_v/20;
	  // temp_ii = temp_i/20;
	   //temp_v2 = temp_v2/20;
//    dc_v[0] = (float) (temp_v/4096.0*3.3*23.0*v_k[0]);	
//    dc_i[0]= (float)((((temp_i/4096.0*3.3)*3.045-i_k[0])*15.15));
	 dc_v[0] = (float) (temp_v/4096.0*3.3*19.25*1.0074*v_k[0]);	
	 dc_v[1] = (float) (temp_v2/4096.0*3.3*19.2*0.9873*v_k[1]); 
	   
     //dc_i[0]= (float)((((temp_i/4096.0*3.3)*1.515-i_k[0])*16.83));//acs712-30a
		 //dc_i[0]= (float)((((temp_ii/4096.0*3.3)-i_k[0])*100));//10mR
   dc_i[0]= (float)((((temp_i/4096.0*3.3)-i_k[0])*4.608)*i_k_a[0]);//10mR
	// dc_i[1]= (float)((((temp_ii/4096.0*3.3)-i_k[0])*7.3272)*i_k_a[0]);//10mR
    //if( dc_i[0] <0 ){  dc_i[0] =0;}
    adc_cont =0;
    temp_v =0;
	 //temp_v2 =0;
	  temp_i =0;
   }
		// printf("test dma interrupt");
	}

   
  /* USER CODE END DMA1_Channel1_IRQn 0 */

  /* USER CODE BEGIN DMA1_Channel1_IRQn 1 */

  /* USER CODE END DMA1_Channel1_IRQn 1 */
}

/**
  * @brief This function handles DMA1 channel4 global interrupt.
  */
void DMA1_Channel4_IRQHandler(void)
{
  /* USER CODE BEGIN DMA1_Channel4_IRQn 0 */
	if(LL_DMA_IsActiveFlag_TC4(DMA1) != RESET)
	{
		LL_DMA_ClearFlag_TC4(DMA1);
	}

  /* USER CODE END DMA1_Channel4_IRQn 0 */

  /* USER CODE BEGIN DMA1_Channel4_IRQn 1 */

  /* USER CODE END DMA1_Channel4_IRQn 1 */
}

/**
  * @brief This function handles TIM1 update interrupt.
  */
void TIM1_UP_IRQHandler(void)
{
  /* USER CODE BEGIN TIM1_UP_IRQn 0 */
	 if(LL_TIM_IsActiveFlag_UPDATE(TIM1))

   {
     //   LL_USART_TransmitData8(USART1,0xAA);
        LL_TIM_ClearFlag_UPDATE(TIM1);
	    if(rx_usart1_cnt > 0){
		   
	//	LL_USART_TransmitData8(USART1,0x55); 
		 

		   
	//	tx_buff_uart(USART1,ModebusRxBuff,rx_usart1_cnt);
		//rx_usart1_cnt=0;
		 LL_TIM_DisableCounter(TIM1);   
		 LL_USART_DisableIT_RXNE(USART1);
		   
	   }

   }

	
  /* USER CODE END TIM1_UP_IRQn 0 */
  /* USER CODE BEGIN TIM1_UP_IRQn 1 */

  /* USER CODE END TIM1_UP_IRQn 1 */
}

/**
  * @brief This function handles TIM3 global interrupt.
  */
void TIM3_IRQHandler(void)
{
  /* USER CODE BEGIN TIM3_IRQn 0 */
	 if(LL_TIM_IsActiveFlag_UPDATE(TIM3))

   {    //LL_USART_TransmitData8(USART1,0xbb);

        LL_TIM_ClearFlag_UPDATE(TIM3);

   }

  /* USER CODE END TIM3_IRQn 0 */
  /* USER CODE BEGIN TIM3_IRQn 1 */

  /* USER CODE END TIM3_IRQn 1 */
}

/**
  * @brief This function handles USART1 global interrupt.
  */
void USART1_IRQHandler(void)
{
  /* USER CODE BEGIN USART1_IRQn 0 */
	
	portBASE_TYPE xHigherPriorityTaskWoken = pdFALSE;
	uint8_t cChar;
	
	// 处理接收数据中断
	if(LL_USART_IsActiveFlag_RXNE(USART1))
	{
		cChar = LL_USART_ReceiveData8(USART1);
		LL_TIM_SetCounter(TIM1, 0);
		if(rx_usart1_cnt == 0) {
			LL_TIM_EnableCounter(TIM1);
		}
		ModebusRxBuff[rx_usart1_cnt] = cChar;
		rx_usart1_cnt++;
		// 防止缓冲区溢出
		if(rx_usart1_cnt >= sizeof(ModebusRxBuff)) {
			rx_usart1_cnt = 0;
		}
	}
	
	// 处理IDLE中断
	if(LL_USART_IsActiveFlag_IDLE(USART1))
	{
		// 清除IDLE标志位
		LL_USART_ClearFlag_IDLE(USART1);
		// 读取数据寄存器以完成清除操作
		(void)USART1->SR;
		(void)USART1->DR;
		
		if(rx_usart1_cnt > 0) {
			// 禁用计数器和接收中断
			LL_TIM_DisableCounter(TIM1);
			LL_USART_DisableIT_RXNE(USART1);
		}
	}
	
  /* USER CODE END USART1_IRQn 0 */
  /* USER CODE BEGIN USART1_IRQn 1 */

  /* USER CODE END USART1_IRQn 1 */
}

/* USER CODE BEGIN 1 */

/* USER CODE END 1 */
